Heterogeneous Integration with Embedded Fine Interconnect

Heterogeneous Integration with Embedded Fine Interconnect

2021 IEEE 71st Electronic Components and Technology Conference (ECTC)

10.1109/ECTC32696.2021.00348

http://dx.doi.org/10.1109/ectc32696.2021.00348

Chai Tai Chong, Lim Teck Guan, David Ho, Han Yong, Chong Ser Choong, Sharon Lim Pei Siang, Surya Bhattacharya

Fabrication , Semiconductor device modeling , Heating systems , Semiconductor device reliability , Layout , Process control , Memory modules, Embedded fine interconnect , high density heterogeneous integration , RDL 1st FOWLP

10 August 2021

Chong, C. T., Guan, L. T., Ho, D., Yong, H., Choong, C. S., Pei Siang, S. L., & Bhattacharya, S. (2021). Heterogeneous Integration with Embedded Fine Interconnect. 2021 IEEE 71st Electronic Components and Technology Conference (ECTC). https://doi.org/10.1109/ectc32696.2021.00348

High density heterogeneous integration of ASIC and HBM2 through the use of embedded fine pitch interconnect (EFI) in face-to-face configuration using RDL 1 st fan-out wafer packaging platform is demonstrated. The EFI configuration, thermal design consideration and heat dissipation for high power application, mechanical structural modeling for warpage control, wafer fabrication and assembly process integration and reliability testing results will be discussed.

Publisher Copyright

This research is funded by Industry.

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https://oar.a-star.edu.sg/communities-collections/articles/18437

2377-5726

978-1-6654-4097-4

Institute of Microelectronics