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5 Jan 2022 SERC Institute of Microelectronics Towards Heterogeneous Integrated Electronic-Photonic Packages for Hyperscale Data Centers Sajay Bhuvanendran Nair Gourikutty, Ming Chinq Jong, Chockanathan Vinoth Kanna, David Soon Wee Ho, Jiaqi Wu, Rathin Mandal, Nanxi Li, Teck Guan Lim, Jason Tsung-Yang Liow, Surya Bhattacharya 2021 IEEE 23rd Electronics Packaging Technology Conference (EPTC)
10 Aug 2021 SERC Institute of Microelectronics Heterogeneous Integration with Embedded Fine Interconnect Chai Tai Chong, Lim Teck Guan, David Ho, Han Yong, Chong Ser Choong, Sharon Lim Pei Siang, Surya Bhattacharya 2021 IEEE 71st Electronic Components and Technology Conference (ECTC)
10 Aug 2021 SERC Institute of Microelectronics FOWLP and Si-Interposer for High-Speed Photonic Packaging Lim Teck Guan, Eva Wai Leong Ching, Jong Ming Ching, Loh Woon Leng, David Ho Soon Wee, Surya Bhattacharya 2021 IEEE 71st Electronic Components and Technology Conference (ECTC)
10 Aug 2021 SERC Institute for Infocomm Research FOWLP AiP Optimization for Automotive Radar Applications Mei Sun, Teck Guan Lim, Tai Chong Chai, Surya Bhattacharya, Yugang Ma 2021 IEEE 71st Electronic Components and Technology Conference (ECTC)
10 Aug 2021 SERC Institute of Microelectronics Case studies of accurate fault localization in advanced packages Sajay Bhuvanendran Nair Gourikutty, Jesse Alton, Desmond Yeo, Kok Keng Chua, Sharon Lim Seow Huang, Surya Bhattacharya 2021 IEEE 71st Electronic Components and Technology Conference (ECTC)
5 Jul 2018 SERC Institute of Microelectronics 100 Gbps (4 × 25 Gbps) Optical Receiver Module Packaged in Chip-on-Board Based on Germanium Photodetector Raja M. Kumarasamy, Jason Tsung Yang Liow, Do-Won Kim, Andy Eu Jin Lim, Vishal Vinayak Kulkarni, Surya Bhattacharya, Guo Qiang Lo Procedia Engineering
1 Nov 2017 SERC Institute of Microelectronics Study on Low Warpage and High Reliability for Large Package Using TSV-Free Interposer Technology Through SMART Codesign Modeling Mian Zhi Ding, Yong Han, Surya Bhattacharya, Fa Xing Che, Masaya Kawano IEEE Transactions on Components, Packaging and Manufacturing Technology
15 Feb 2016 SERC Institute of Microelectronics An Analytical Capacitance Model for Through Silicon Vias (TSVs) in Floating Silicon Substrate Ka Fai Chang, Jun Zhou, Surya Bhattacharya, Roshan Weerasekera, Guruprasad Katti, Rahul Dutta, Songbai Zhang IEEE TRANSACTION ON ELECTRON DEVICES
1 Aug 2015 SERC Institute of Microelectronics Fabrication and Assembly of Cu-RDL-Based 2.5-D Low-Cost Through Silicon Interposer (LC–TSI) Guruprasad Katti, David Soon Wee Ho, Hong Yu Li, Rahul Dutta, Roshan Weerasekera, Ka Fai Chang, Jong-Kai Lin, Vempati Srinivasa Rao, Surya Bhattacharya IEEE Design & Test