Li, H. Y., Liu Huihong, C., Jaafar, N., Ahmadi, M., Kumar, M. D., Simonl, G. C. K., YanYan, Z., Mukherjee, M., & Jien, C. K. (2023, December 5). Process Development and Integration on Si Substrate for Ion trap-based Quantum Processors. 2023 IEEE 25th Electronics Packaging Technology Conference (EPTC). https://doi.org/10.1109/eptc59621.2023.10457687
Abstract:
Si substrates provide flexible platform for quantum
application that can integrate photonic components, active devices, and metal electrodes. Photonics
integrated surface ion trap can effectively integrate the functionality of photonics integrated
circuits and ion traps on the same Si-substrate. The ion trap electrodes are fabricated on a 300mm
high resistivity substrate. Both leakage current and capacitance meet the device factional
requirements at the wafer scale. The loaded Q-factor of the package at 9.8K is over 20, allowing
application of 300V RF at low power at a trap drive frequency of 16 MHz for barium ion.
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Funding Info:
This research / project is supported by the National Research Foundation, Singapore - Quantum Engineering Program
Grant Reference no. : NRF2021-QEP2-03-P07
This research / project is supported by the A*STAR - Towards a scalable quantum machine learning solution using trapped ions (QEP 2.0)
Grant Reference no. : C222517002