Jaafar, N. B., Lau, D., Li, H., Ng, Y. C., & Tseng, Y.-C. (2026). Flip chip interconnects for quantum computing application: a comparison between tin-silver and indium bump. In I. A. Burenkov, P. R. Hemmer, A. L. Migdall (Editors), Quantum Computing, Communication, and Simulation VI. https://doi.org/10.1117/12.3076290
Abstract:
With the increasing of qubit numbers, quantum circuit capacity dramatically increases from 5K (2024) to 100 Mil (2029) based on IBM quantum roadmap [1]. The primary benefits of the flip-chip assembly process include the ability to enable heterogeneous integration, increase device density and save latency associated with the complex wirings. To withstand quantum application, solder bump must possess superconductivity, mechanic strength and thermal stability under cryogenic environment. Lead-free SnAg bumps have been shown to match the quality and reliability standards required by flip chip products. SnAg alloys provide excellent wettability, mechanical strength, and resistance to creep and thermal fatigue. Meanwhile, indium has the benefits of being ductile, cryogenically stable, having both strong thermal and electrical conductivity as a solder material.
In this work, the constructed stacked module is made up of two silicon chips, one measuring 4.0 mm by 4.0 mm on top and 5.5 mm by 5.5 mm on the bottom as shown in Figure 1. The solder bumps connection is evaluated by connecting the top and bottom chips via a daisy chain. SnAg and indium bumps flip chip process optimization required to ensure no bumps shorting and abnormalities. After bonding, X-ray imaging is utilized to inspect individual bumps. The quality and reliability of the solder joints comparison between SnAg and indium with under bump metallization (UBM) checked using shear strength measurement, cross-sectioning, and scanning electron microscopy (SEM) imaging. Failure mode after the shear measurement were inspected to check for the good adhesion between the bump and the UBM using high power scope. The SnAg and indium samples after flip chip will undergo multiple thermal cycles (300K to 100mK) to understand the reliability of the solder joint.
The proposed work has some important results, which are summarized as follows:
With flip chip parameters optimization, both SnAg and indium bump interconnects generate a well-formed structure and preserve parallelism between the top and bottom chips without solder bump short.
Both indium & SnAg show bulk solder fracture upon die shearing indicating SnAg and indium have good adhesion to the bonding pad. SnAg shearing measurement is 13.551kg while indium is 1.523kg. SnAg is having higher die shear measurement due to higher hardness properties as compared to indium.
Experimental reveal SnAg critical temperature (Tc) is 3.32K while indium Tc is 3.2K.
Both SnAg and indium survive thermal cycling for up to 5 rounds with electrical shown no significant resistance different before and after Thermal Cycles (TC). Testing for TC for SnAg and indium are still ongoing.
License type:
Publisher Copyright
Funding Info:
This research / project is supported by the National Research Foundation, Singapore through the National Quantum Office - Quantum Engineering Programme 3.0 Funding Initiative
Grant Reference no. : W24Q3D0003
Description:
Copyright 2026 Society of Photo‑Optical Instrumentation Engineers (SPIE). One print or electronic copy may be made for personal use only. Systematic reproduction and distribution, duplication of any material in this publication for a fee or for commercial purposes, and modification of the contents of the publication are prohibited.