A. Sundaram, R. Kang and B. S. S. C. Rao, "Patterning of 1µm Through Silicon via Critical Dimension Using Positive Tone Resist Mask with a Photolithography Stepper," 2024 IEEE 26th Electronics Packaging Technology Conference (EPTC), Singapore, 2024, pp. 1235-1239, doi: 10.1109/EPTC62800.2024.10909935. keywords: {Scalability;Lithography;Resists;Packaging;Silicon;Integrated circuit packaging;Automobiles;Through-silicon vias;Substrates;Optimization},
Abstract:
Through-Silicon Via (TSV) formation is a key process in
integrated circuit packaging, enabling high-density 2.5D/3D
integration. This study investigated the impact of two different
resist types—chemically amplified resist (CAR) and Novolac
resist—on TSV patterning using an i-line stepper to improve
critical dimension uniformity (CDU) across the wafer and
within the field. Although the results showed minimal
differences between the two resists, CAR exhibited better
performance post-lithography, while Novolac performed
better post-etch in terms of CDU. To understand the effect of
varying incoming substrates, oxide hard mask schemes were
compared to direct bare silicon to assess their influence on
CDU. Additionally, the impact of TSV via pitch variation on
patterning was explored, and how it could streamline
development for finer pitch designs for TSV scalability,
without requiring higher numerical aperture (NA) tools or
advanced front-end equipment. Performance on bare Si wafers
with Novolac resist was superior post-etch. However,
achieving better CDU for denser pitch designs proved to be
more challenging compared to baseline pitch. This
comprehensive analysis of process splits provided valuable
insights into lithography optimization and highlighted
opportunities for pushing the boundaries of the etch process
further.
License type:
Publisher Copyright
Funding Info:
This research / project is supported by the Agency for Science, Technology and Research - IME-Applied Centre of Excellence in Advanced Packaging 3.0 (Packaging 3.0)
Grant Reference no. : NA