Lim, S. P., Rotaru, M. D., Seit, W., & Yao, H. H. (2023, May). Assembly Challenges and Approaches for 2.5D Chiplet Based System. 2023 IEEE 73rd Electronic Components and Technology Conference (ECTC). https://doi.org/10.1109/ectc51909.2023.00031
Abstract:
In recent years, the semiconductor industry has seen a slow down in Moore's law and witnessed longer time spans between process technology nodes. In addition, the integration of transistors on a monolithic chip is becoming more challenging due to available options for device miniaturization [1], [2]. The other issues in chip design and manufacturing are its cost and performance. The application of chip level heterogeneous integration or called the Chiplet technology is a promising solution for this node size limitation. Chiplets are small IC dies with specialized functionality, designed to be combined to make up a larger integrated circuit, following the semiconductor industry's trend of heterogeneous integration [3]. In this paper, 3 different HDFOWLP MCP is designed integrated with chip-to chip interconnections on the RDL-first FOWLP platform. One of the MCP package is using the Intel functional FinFet 22nm chips.
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Publisher Copyright
Funding Info:
This research / project is supported by the A*STAR - Programmatic - Neuromorphic Processor Design - Neuron Circuits (Project 1 in LOA)
Grant Reference no. : A1687b0033