Zhao, P., Likforman, J. P., Li, H. Y., Tao, J., Henner, T., Lim, Y. D., Seit, W. W., Tan, C. S., & Guidoni, L. (2021). TSV-integrated surface electrode ion trap for scalable quantum information processing. Applied Physics Letters, 118(12), 124003. https://doi.org/10.1063/5.0042531
In this study, we report the first Cu-filled through silicon via (TSV) integrated ion trap. TSVs are placed directly underneath electrodes as vertical interconnections between ion trap and a glass interposer, facilitating the arbitrary geometry design with increasing electrodes numbers and evolving complexity. The integration of TSVs reduces the form factor of ion trap by more than 80%, minimizing parasitic capacitance from 32 to 3 pF. A low RF dissipation is achieved in spite of the absence of ground screening layer. The entire fabrication process is on 12-inch wafer and compatible with established CMOS back end process. We demonstrate the basic functionality of the trap by loading and laser-cooling single 88Sr+ ions. It is found that both heating rate (17 quanta/ms for an axial frequency of 300 kHz) and lifetime (~30 minutes) are comparable with traps of similar dimensions. This work pioneers the development of TSV-integrated ion traps, enriching the toolbox for scalable quantum computing.
This research / project is supported by the A*STAR Quantum Technology for Engineering - 3D Interconnects and Multi-chip interposer Platform for Scalable Quantum Computing
Grant Reference no. : A1685b0005
This article may be downloaded for personal use only. Any other use requires prior permission of the author and AIP Publishing. This article appeared in Zhao, P., Likforman, J. P., Li, H. Y., Tao, J., Henner, T., Lim, Y. D., Seit, W. W., Tan, C. S., & Guidoni, L. (2021). TSV-integrated surface electrode ion trap for scalable quantum information processing. Applied Physics Letters, 118(12), 124003 and may be found at https://doi.org/10.1063/5.0042531