Ata, S. K., Kong, Z. H., James, A., Cai, L., Yeo, K. S., Aung, K. M. M., Foo, C. S., & James, A. (2024). Towards Safe and Efficient Analog Circuit Design: Active Learning for Feasibility Region Exploration. 2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 193–197. https://doi.org/10.1109/apccas62602.2024.10808909
Abstract:
Active learning (AL), a machine learning paradigm, allows models to focus on the most informative data points, reducing reliance on extensive labeled data. This is particularly valuable in circuit design, where labeled data is expensive and scarce. By efficiently modeling complex behaviors in analog and RF circuits, AL helps reduce costs, and adapt to varied design scenarios. Traditional AL methods focus on learning efficiency but often fail to distinguish between feasible and infeasible design configurations, crucial for practical applications. We propose a novel safe active learning (SAL) approach, Feasibility-Guided Uncertainty-Weighted Embeddings (FGUE), that enhances learning efficiency by prioritizing data points that are both informative and feasible, thereby reducing the risk of exploring unproductive or infeasible design spaces and ensuring that each iteration contributes effectively to the model’s accuracy and applicability.
License type:
Publisher Copyright
Funding Info:
This research / project is supported by the National Research Foundation - Competitive Research Programme
Grant Reference no. : NRF-CRP20-2017-0003