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18 Mar 2024
SERC
Institute of Microelectronics
Process and Integration Challenges for Via Last TSV (from top) on Functional LNA SOI wafers for 3D Heterogeneous chiplet integration
(Pending publish)
Xiangyu Wang,
Mihai Dragos Rotaru,
Yu Haitao,
Mingchinq Jonq,
Chai Tai Chong,
King-Jien Chui
2023 IEEE 25th Electronics Packaging Technology Conference (EPTC)
5 Jan 2022
SERC
Institute of Microelectronics
Silicon Isolation Trench Integration for the 4-stack Memory Wafer
Xiangyu Wang,
Masaya Kawano,
B.S.S. Chandra Rao
2021 IEEE 23rd Electronics Packaging Technology Conference (EPTC)
10 Aug 2021
SERC
Institute of Microelectronics
Dielectric Materials Characterization for Hybrid Bonding
Vivek Chidambaram,
Prayudi Lianto,
Xiangyu Wang,
Gilbert See,
Nicholas Wiswell,
Masaya Kawano
2021 IEEE 71st Electronic Components and Technology Conference (ECTC)
30 May 2017
SERC
Institute of Microelectronics
Passive Devices Fabrication on FOWLP and Characterization for RF Applications
Chunmei Wang,
King Jien Chui,
Xiangyu Wang,
Teck Guan Lim,
Mingbin Yu,
Gilbert See,
Gu Yu
2017 IEEE 67th Electronic Components and Technology Conference (ECTC)
30 May 2017
SERC
Institute of Microelectronics
A Novel Method for Air-gap Formation around Via-Middle (VM) TSVs for Effective Reduction in Keep-Out Zones (KOZ)
Woon Leng Loh,
Xiangyu Wang,
Zhaohui Chen,
Mingbin Yu,
King-Jien Chui
2017 IEEE 67th Electronic Components and Technology Conference (ECTC)
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