| Publication date | Communities | Collections | Article title | Author(s) | Journal/Conference |
|---|---|---|---|---|---|
| 10 Aug 2021 | SERC | Institute of Microelectronics | One-step TSV process development for 4-layer wafer stacked DRAM | Masaya Kawano, Xiang-Yu Wang, Qin Ren, Woon-Leng Loh, BSS. Chandra Rao, King-Jien Chui | 2021 IEEE 71st Electronic Components and Technology Conference (ECTC) |