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26 Jun 2024 SERC Institute of Microelectronics Process Challenges in Thin Wafers Fabrication with Double Side Hybrid Bond Pads for Chip Stacking Mishra Dileep Kumar, Vasarla Nagendra Sekhar, B.S.S. Chandra Rao, Ser Choong Chong, Vempati Srinivasa Rao 2024 IEEE 74th Electronic Components and Technology Conference (ECTC)
18 Mar 2024 SERC Institute of Microelectronics Reliability Assessment of 2.5D Module using Chip to Wafer Hybrid Bonding Ser Choong Chong, Jason Au Keng Yuen, Vasarla Nagendra Sekhar, Ismael Cereno Daniel, Mishra Dileep Kumar, Vempati Srinivasa Rao 2023 IEEE 25th Electronics Packaging Technology Conference (EPTC)
3 Aug 2023 SERC Institute of Microelectronics Cu Damascene Process on Temporary Bonded Wafers for Thin Chip Stacking using Cu-Cu Hybrid Bonding Vasarla Nagendra Sekhar, Mishra Dileep Kumar, Prayudi Lianto, Ser Choong Chong, Vempati Srinivasa Rao 2023 IEEE 73rd Electronic Components and Technology Conference (ECTC)
3 Aug 2023 SERC Institute of Microelectronics Development of 4 die stack module using Hybrid bonding approach Ser Choong Chong, Jason Au Keng Yuen, Vasarla Nagendra Sekhar, Ismael Cereno Daniel, Vempati Srinivasa Rao 2023 IEEE 73rd Electronic Components and Technology Conference (ECTC)
30 May 2017 SERC Institute of Microelectronics Study of C2W Bonding Using Cu Pillar with Side-wall Plated Solder Daniel Ismael Cereno, Sunil Wickramanayaka, Vasarla Nagendra Sekhar, Ling Xie 2017 IEEE 67th Electronic Components and Technology Conference (ECTC)
1 Sep 2013 SERC Institute of Microelectronics Low-Loss Broadband Package Platform With Surface Passivation and TSV for Wafer-Level Packaging of RF-MEMS Devices Jaibir Sharma, Cheng Jin, Ying Ying Lim, Justin See Toh, Sanchitha Fernando, Bangtao Chen, Vasarla Nagendra Sekhar IEEE Transactions on Components, Packaging and Manufacturing Technology