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15 Feb 2016
SERC
Institute of Microelectronics
An Analytical Capacitance Model for Through Silicon Vias (TSVs) in Floating Silicon Substrate
Ka Fai Chang,
Jun Zhou,
Surya Bhattacharya,
Roshan Weerasekera,
Guruprasad Katti,
Rahul Dutta,
Songbai Zhang
IEEE TRANSACTION ON ELECTRON DEVICES
1 Aug 2015
SERC
Institute of Microelectronics
Fabrication and Assembly of Cu-RDL-Based 2.5-D Low-Cost Through Silicon Interposer (LC–TSI)
Guruprasad Katti,
David Soon Wee Ho,
Hong Yu Li,
Rahul Dutta,
Roshan Weerasekera,
Ka Fai Chang,
Jong-Kai Lin,
Vempati Srinivasa Rao,
Surya Bhattacharya
IEEE Design & Test
23 Jun 2015
SERC
Institute of Microelectronics
Heterogeneous 2.5D integration on through silicon interposer
Xiaowu Zhang,
Jong Kai Lin,
Sunil Wickramanayaka,
Songbai Zhang,
Roshan Weerasekera,
Rahul Dutta,
Ka Fai Chang,
King-Jien Chui,
Hong Yu Li,
David Ho,
Liang Ding,
Guruprasad Katti,
Suryanarayana Bhattacharya,
Dim-Lee Kwong
Applied Physics Reviews
8 Oct 2014
SERC
Institute of Microelectronics
BIST Methodology, Architecture and Circuits for Pre-Bond TSV Testing in 3D Stacking IC Systems
Minkyu Je,
Xin Liu,
Philippe Royannez,
Jun Zhou,
Roshan Weerasekera,
Bin Zhao,
Chao Wang
IEEE Transactions on Circuits and Systems I: Regular Papers
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