| Publication date | Communities | Collections | Article title | Author(s) | Journal/Conference |
|---|---|---|---|---|---|
| 5 Jan 2022 | SERC | Institute of Microelectronics | Silicon Isolation Trench Integration for the 4-stack Memory Wafer | Xiangyu Wang, Masaya Kawano, B.S.S. Chandra Rao | 2021 IEEE 23rd Electronics Packaging Technology Conference (EPTC) |