Cu Damascene Process on Temporary Bonded Wafers for Thin Chip Stacking using Cu-Cu Hybrid Bonding

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Cu Damascene Process on Temporary Bonded Wafers for Thin Chip Stacking using Cu-Cu Hybrid Bonding
Title:
Cu Damascene Process on Temporary Bonded Wafers for Thin Chip Stacking using Cu-Cu Hybrid Bonding
Journal Title:
2023 IEEE 73rd Electronic Components and Technology Conference (ECTC)
Keywords:
Publication Date:
03 August 2023
Citation:
Sekhar, V. N., Kumar, M. D., Lianto, P., Chong, S. C., & Rao, V. S. (2023, May). Cu Damascene Process on Temporary Bonded Wafers for Thin Chip Stacking using Cu-Cu Hybrid Bonding. 2023 IEEE 73rd Electronic Components and Technology Conference (ECTC). https://doi.org/10.1109/ectc51909.2023.00100
Abstract:
Hybrid bonding is one of the innovative permanent bonding technologies that form dielectric-dielectric and metal-metal bonds, respectively. Hybrid bonding is an extension of fusion bonding technology with additional embedded copper pads in the dielectric to form the electrical connection between the chips. The present study focuses on multi-thin chip C2W hybrid bonding as it is not well explored yet and it requires non-standard temporary bonded thin wafers to go through the standard Cu damascene process flow. Cu damascene technology is well-established for standard wafer thicknesses, but it is not fully established for thin wafers. Wafer frontside processes cannot be completely replicated on the wafer backside due to the thermal budget and total thickness variation (TTV) of the temporary bonding glues. In view of that, different dielectric materials are evaluated, including polymer and low-temperature deposited inorganic dielectric materials on the wafer backside. Revised process recipes and flows have been developed by limiting the temperatures up to 200 °C to fabricate 50 μm thin wafers. Key issues associated with temporary bonded wafers, like glue residues after the backgrinding process, glue TTV and wafer chipping have been mitigated using special recipes. In this work, key modules like wafer thinning, CVD, CMP, and annealing have been requalified to establish Cu damascene flow for temporary bonded wafers.
License type:
Publisher Copyright
Funding Info:
This paper was supported by industry project & Chip to Wafer Hybrid Bonding Consortium.
Description:
© 2023 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
ISSN:
2377-5726
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