Wong, M. M., Chen, L., & Do, A. T. (2021). A 25 TOPS/W High Power Efficiency Deterministic and Split Stochastic MAC (SC-MAC) Design. 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC). https://doi.org/10.1109/vlsi-soc53125.2021.9606972
Abstract:
This work presented a stochastic computing (SC) split multiply-and-accumulate (MAC) unit that is operated using deterministic sequence and is able to achieve time latency and power reductions without accuracy degrading. In this improved deterministic SC design, the conventional Stochastic Number Generator (SNG) with large overhead is replaced with a lightweight decoder that effectively generates uncorrelated and segmented stochastic number (SN) without the need for random sources (PRNG). The proposed deterministic and split SC-MAC is implemented in ASIC 40nm technology for detailed hardware evaluation and its functionality is also verified in convolutional neural network (CNN) using MNIST data sets. The new SCMAC is found to be higher in power efficiency (GMACS/mW) and lower in energy consumption (pJ/MAC) as compared to the conventional SC-MAC as well as the prior arts.
License type:
Publisher Copyright
Funding Info:
This research / project is supported by the A*STAR - Programmatic - Research, Innovation and Enterprise 2020 plan (Advanced Manufacturing and Engineering domain)
Grant Reference no. : A1687b0033