Wafer-to-Wafer Hybrid Bonding Challenges for 3D IC Applications

Wafer-to-Wafer Hybrid Bonding Challenges for 3D IC Applications

2021 IEEE 23rd Electronics Packaging Technology Conference (EPTC)

10.1109/EPTC53413.2021.9663937

http://dx.doi.org/10.1109/eptc53413.2021.9663937

H. Y. Li, Hong Miao Ji, Alfred Neo Siang Kiat, Masaya Kawano

05 January 2022

Li, H. Y., Ji, H. M., Kiat, A. N. S., & Kawano, M. (2021). Wafer-to-Wafer Hybrid Bonding Challenges for 3D IC Applications. 2021 IEEE 23rd Electronics Packaging Technology Conference (EPTC). https://doi.org/10.1109/eptc53413.2021.9663937

Wafer-to-wafer hybrid bonding is a hot topic because of the high density device application. There are many process challenges for the wafer-to-wafer hybrid bonding. We encountered serious wafer edge offset issue within process development. The root cause was found out and process improvement was followed. The good bonding quality was achieved finally.

Publisher Copyright

This research is funded by Wafer-to-Wafer Hybrid Bonding 3D IC Consortium.

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https://oar.a-star.edu.sg/communities-collections/articles/18758

978-1-6654-1619-1

Institute of Microelectronics