Synapse and Tunable Leaky-Integrate Neuron Functions Enabled by Oxide Trapping Dynamics in a Single Logic Transistor

Synapse and Tunable Leaky-Integrate Neuron Functions Enabled by Oxide Trapping Dynamics in a Single Logic Transistor

IEEE Electron Device Letters

10.1109/LED.2022.3162639

http://dx.doi.org/10.1109/led.2022.3162639

Xin Ju, Diing Shenp Ang

Electrical and Electronic Engineering, Electronic, Optical and Magnetic Materials

28 March 2022

Ju, X., & Ang, D. S. (2022). Synapse and Tunable Leaky-Integrate Neuron Functions Enabled by Oxide Trapping Dynamics in a Single Logic Transistor. IEEE Electron Device Letters, 43(5), 793–796. https://doi.org/10.1109/led.2022.3162639

We show that a high-k gated n-MOSFET can embody both the memory plasticity of a synapse and leaky-integration of a neuron, by virtue of the rich temporal dynamics of charge capture/emission by gate-oxide defects. In addition, a tunable leaky-integrate function is demonstrated. The lower limit of energy per input spike is on the order of fJ, which provides room for low-power trigger circuit design and scalability. This work points to the prospect of a gate-engineered logic transistor serving as the universal building block of hardware spiking neural networks, thereby accelerating the realization of compact, energy efficient neuromorphic computers given the relative maturity of the transistor technology.

Publisher Copyright

This research / project is supported by the Ministry of Education - Academic Research Fund Tier 2
Grant Reference no. : MOE-T2EP50120-0003

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