Prawoto, C., Ma, Z., Xiao, Y., Raju, S., & Chan, M. (2021). Air-Gap Technology With a Large Void-Fraction for Global Interconnect Delay Reduction. IEEE Transactions on Electron Devices, 68(10), 5078–5084. https://doi.org/10.1109/ted.2021.3105086
With a goal of delay and power reduction in global buses, an air-gap technology for upper-layer interconnect is introduced. The fabrication process is discussed, utilizing h -BN as an air-gap capping layer to enable large voids. The suitability of an air-gap technology for integration into the upper-layer back-end-of-line (BEOL) interconnect is evaluated in terms of the void ratio to the adjacent-line spacing. Electrical measurements show that adjacent-line capacitance is reduced by 50%. Mechanical reliability is ensured by Young’s modulus above BEOL requirement. Moisture uptake into air gaps is prevented using a hydrophobic capping layer. The integration of air gaps in global buses results in a 41% and 60% reduction in delay and crosstalk in the worst case switching scenario, based on parameters in the 14-nm technology node. It allows a 72% reduction in the energy-delay product with optimally designed repeaters. For the same delay, power consumption in an air-gapped global bus is reduced by requiring 4× fewer repeaters.
This work was supported by the Guangdong Basic and Applied Basic Research Foundation under Grant GDST19EG20.