Zhao, J., Gao, Y., Zhang, T.-T., Son, H., &amp; Heng, C.-H. (2021). A 310-nA Quiescent Current 3-fs-FoM Fully Integrated Capacitorless Time-Domain LDO With Event-Driven Charge Pump and Feedforward Transient Enhancement. IEEE Journal of Solid-State Circuits, 56(10), 2924–2933. https://doi.org/10.1109/jssc.2021.3077453
In this article, a fully integrated capacitorless low-dropout regulator (LDO) is presented for Internet-of-Things (IoT) edge sensor application. To achieve sub-1-V operation and fast transient response with low quiescent current, the conventional operational transconductance amplifier (OTA)-based error amplifier (EA) is replaced with oscillator-based voltage-to-time converter and time-domain signal processing, including time-domain edge-based frequency comparator (FC) and event-driven voltage mode charge pump (CP). Compared with the conventional phase frequency detector (PFD), the proposed clock-edge-based FC achieved more than six times power reduction. Event-driven CP is adopted to drive analog power transistor and the transient response is enhanced by feedforward capacitor CFD and coarse–fine CP control. To further reduce the power consumption, multi-voltage domain and clock frequency optimization are implemented. A prototype chip is fabricated in a standard 65-nm CMOS process. The design only consumes 310-nA quiescent current while achieving 0.5–1.2-V input range, 1.0×106 load dynamic range, and 3-fs figure of merit (FoM).
This research / project is supported by the Agency for Science, Technology and Research - Nanosystems at the Edge
Grant Reference no. : A18A1b0055
This research / project is supported by the Agency for Science, Technology and Research - Neurodevice Phase II programme
Grant Reference no. : IAF311022