Guan, L. T., Ching, E. W. L., Ching, J. M., Leng, L. W., Wee, D. H. S., & Bhattacharya, S. (2021). FOWLP and Si-Interposer for High-Speed Photonic Packaging. 2021 IEEE 71st Electronic Components and Technology Conference (ECTC). https://doi.org/10.1109/ectc32696.2021.00050
Abstract:
A FOWLP and a Si-Interposer integration platform for Electronic IC (EIC) and Photonic IC (PIC) are described here. These two platforms are capable to support high-speed integration and scalable design of the next generation Optical Engine. The integration of the PIC on the FOWLP is achieved by a simple novel solution. An additional section of the Si substrate is designed at the end of the PIC to protect the optical I/Os during the FOWLP embedding process. For the Through Si-Interposer, besides providing the EIC and PIC, it include the passive alignment feature for the fibre to the PIC assembly.
License type:
Publisher Copyright
Funding Info:
This research / project is supported by the A*STAR - GAP
Grant Reference no. : ETPL/18-GAP056-R20A