Due to its robust performance, resistive random access memory (RRAM) has garnered interest as a potential replacement for non-volatile memory (NVM), with potential applications in neuromorphic computing for AI. However, its deployment has been hindered by the large variability of properties, including the forming times of conductive filaments in RRAM devices. Empirically, this forming time has been shown to be correlated with the microstructure of the RRAM. Since the microstructure can be modified via processing conditions, such as anneal time and temperature, there is potential to reduce undesirable heterogeneity in forming times through process control. As a first step towards this goal, Raghavan has studied the effect of grain boundaries having a different defect formation rate from the bulk on the forming times in a percolation model. To capture the potential effect of different grain boundaries, we extend Raghavan’s model by varying the defect generation rates of grain boundaries. We find that doing so results in increased variability in the forming times, suggesting that microstructural engineering to minimize grain boundary inhomogeneity may help reduce such variability and improve RRAM reliability.