Heterogeneous 2.5D integration on through silicon interposer

Heterogeneous 2.5D integration on through silicon interposer
Heterogeneous 2.5D integration on through silicon interposer
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Applied Physics Reviews
Publication Date:
23 June 2015
Appl. Phys. Rev. 2, 021308 (2015); http://dx.doi.org/10.1063/1.4921463
Driven by the need to reduce the power consumption of mobile devices, and servers/data centers, and yet continue to deliver improved performance and experience by the end consumer of digital data, the semiconductor industry is looking for new technologies for manufacturing integrated circuits (ICs). In this quest, power consumed in transferring data over copper interconnects is a sizeable portion that needs to be addressed now and continuing over the next few decades. 2.5D Through-Si-Interposer (TSI) is a strong candidate to deliver improved performance while consuming lower power than in previous generations of servers/data centers and mobile devices. These low-power/high-performance advantages are realized through achievement of high interconnect densities on the TSI (higher than ever seen on Printed Circuit Boards (PCBs) or organic substrates), and enabling heterogeneous integration on the TSI platform where individual ICs are assembled at close proximity (<1 mm separation) compared with several centimeters on a typical PCB. In this paper, we have outlined the benefits of adopting 2.5D TSI technology and also highlighted the current day approaches to implement this technology in Si fabrication facilities, and in assembly/packaging factories. While the systems and devices that power the mobile society benefit from exploiting advantages of 2.5D integration on TSI, there do exist surmountable challenges that need to be addressed for this relatively new technology to be used in high volume production of next generation semiconductor devices. The key areas of focus and challenges include: Technology planning and design-execution that are necessary for harnessing 2.5D TSI for building systems, processing flow for the fabrication of 100 μm thick TSI at acceptable costs, manufacturing flow for assembling multiple ICs on a 100 μm thick TSI in a repeatable, and reliable manner, thermo-mechanical analysis and optimization for addressing warpage issues, and thermal management for addressing heat dissipation. We have outlined design, manufacturing methodologies, and challenges, along with solutions to the challenges associated with taking 2.5D TSI technology to high volume production within the next few years.
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